Enhanced Step Location in the Magnitude and Phase of an AC Signal via Polynomial Approximation Total Variation (PATV) Filtering

Martins, M. B. and Esquef, P. A. A., and Vasconcellos, R. T. B.

Companion Website of the paper published in the proceedings of the IEEE International Workshop on Applied Measurements for Power Systems, AMPS 2023.



Abstract—In PMU calibration, response time and delay time are measured by feeding to the PMU an AC signal with a step change in magnitude or phase. Estimating accurately the reference step location is an important task in this process. In a paper presented at the 2019 IEEE AMPS, we proposed a Hybrid Step Location Estimator (HSLE), which is based on the Hilbert’s transform (HT) analysis of the AC signal to obtain the related instantaneous magnitude and phase, upon which the estimation is carried out. We found that the performance of the HSLE decreased with the SNRdB of the AC signal. To render the HSLE more robust to noise, in this paper, we propose using the so called Polynomial Approximation Total Variation (PATV) decomposition to extract a noiseless step component from the instantaneous functions. The modified estimator (HSLE_PATV) is evaluated against the HSLE. Experimental results show that, for SNRdB ≥ 55 dB, the HSLE_PATV and the HSLE perform similarly. For SNRdB ∈ {30, 40} dB, the HSLE_PATV outperforms the HSLE, providing more accurate step location estimates, with higher confidence levels, but at a higher computational cost.

Link to the AMPS2019 paper that introduces the HSLE.

Matlab Scripts

Click here to download a .ZIP file with the reference implementation of the HSLE_PATV, a script to run the Performance Evaluation of the HSLE_PATV and scripts to generate Figs. 1 and 2. All scripts have been tested with Matlab 2012b.


Laboratorial Setup

The Figure below shows a block diagram of the prototype PMU calibration system at INMETRO. Its hardware architecture is based on a PXI modular system, with synchronized generation and sampling of low voltage AC signals (lower than 10 Vp). To rise the voltage to the typical 70 Vp at the input of the Device Under Test (DUT), e.g., a PMU, an external voltage amplifier is used. A resistive voltage divider (RVD) is used to attenuate the AC signal to √2 Vp (1 VRMS)  to be digitized by Sampling module. The Generation and Sampling modules are controlled by the CPU module, where the samples of a reference AC discrete-time waveform is prescribed to be then reproduced as an analog waveform by the Generation module. After proper amplification, this AC signal is fed to to the DUT. Synchronously to the Generation module, the Sampling module digitizes a scaled-down version of the analog signal fed to the DUT and outputs a digital sequence x[n], which is submitted to the HSLE_PATV, running in the CPU.


lab setup


The measured SNRdB of an AC signal at the output of the Generation module is about 62 dB, taking as the clean reference the samples of the AC signal loaded to Generation Module.

For the purpose of performance evaluation of the HSLE_PATV in a real-world PMU calibration scenario, we considered that the signal distortion due to the voltage amplifier and the RVD would be negligible in comparison with that produced by the Generation module. Therefore, we connected its analog output directly to the analog input of the Sampling module.

As before we evaluate the HSLE_PATV separately for each type of step in an AC signal: in magnitude (Case 1), in phase (Case 2), and simultaneously in magnitude and phase (Case 3).